Hybrid Electronics Designs Ltd — specialist engineering in FPGA design, verification, and secure embedded systems. Twelve years across UK defence and aerospace, from radar to cryptographic platforms. Alongside that: financial analysis, MBA work, and training material published openly as it develops.
Repositories connecting as projects reach publishable state.
github.com/pkhybridTechnical writing, reference guides, and notes across FPGA design, defence systems, radar, cryptography, and applied tooling. Code-linked work connects to GitHub as projects mature.
Corporate finance, quantitative analysis, strategy and management work — produced through the Imperial College MBA and ongoing study. Covers valuation, portfolio methods, organisational topics, and market research.
VHDL tutorials and self-designed modules on post-quantum cryptography and quantitative methods — written to be useful to others, not just for personal reference.
Translating NIST PQC standards (ML-KEM, ML-DSA, SLH-DSA) into actionable FPGA design knowledge. Written for engineers with HDL backgrounds who need to work with post-quantum cryptography without being cryptographers.
An intuition-first guide to quantitative concepts in finance. Every symbol grounded in plain language before being introduced formally. Worked numerical examples throughout using a Gold / Oil / Silver dataset.
is a UK-based specialist engineering company, founded in 2018. It operates across defence, secure communications, and safety-critical sectors — delivering FPGA design, verification, and embedded systems engineering for programmes where reliability is key.
Services include technical consulting, project delivery, and training for engineering teams.
Priyank Krishnani, founder of Hybrid Electronics Designs, is an FPGA design and verification engineer with twelve years of experience in digital electronics engineering. His work spans radar signal processing, cryptographic platforms, Ethernet IP encryptors, nuclear safety systems, and submarine power electronics — predominantly across the UK defence sector.
Alongside this, he holds an MBA from Imperial College London and is actively developing expertise in FPGA applications for financial infrastructure — an area driven by the same low-latency, high-reliability constraints that define defence engineering.
| Area | Detail |
|---|---|
| HDL | VHDL (Expert), SystemVerilog, Verilog |
| Simulation | MATLAB & Simulink (Expert), QuestaSim, ModelSim, OSVVM, UVM |
| EDA Toolchains | Xilinx Vivado, Altera Quartus, Microsemi Libero |
| Platforms | Xilinx - Alveo U50, ZCU104, ZCU111 |
| Protocols | AXI-Stream, AXI-Lite, Ethernet, Aurora, UART, I2C, SPI, SATA, ecPRI (Developing) |
| Cryptography | AES-256, IKE/IPsec |
| Programming | Python (Intermediate), C++(Developing), MATLAB scripting, Tcl |
| Standards & Requirements | DO-254 Level B, IBM DOORS |
| Finance & Analytics | Financial modelling - DCF, DDM, LBOs, accounting, portfolio statistics, kdb+/q for high-frequency data and applied AI tooling |
| Timing & Sync | PTP (Developing), NTP (Developing), WhiteRabbit (Developing) |
Project-based engagement across defence, secure communications, and safety-critical programmes — from architecture through to timing closure.
VHDL, verification methodology, and bespoke material for engineering teams — developed from direct programme experience, not textbooks.
Open to consulting, research partnerships, and early-stage collaborations in defence, low-latency systems, or applied engineering.